Electronics Overview

Call: +44 (0)23 8098 8890
E-mail:

FPGA Design Flow Offer

Our electronics team has experience in developing digital IP for FPGA and ASIC technologies, as well as systems and PCB design.

We have comprehensive experience of FPGA and digital ASIC design flows from planning and HDL coding through to simulation, synthesis, post-layout verification and evaluation.

Our design methodologies focus on quality at every stage and include detailed peer reviews and high-coverage automated testing in both simulation and evaluation.

To learn more about our FPGA design flow and maybe get some ideas to apply to your own projects, take a guided interactive tour of our flow.

 

IP Development FPGA Design
  • Bespoke/Complex Algorithms
  • High Speed Interfaces
  • Memory Controllers
  • Softcore Processors
  • Signal Processing
  • Low Power Design
  • Resource Optimisation
  • Frequency Optimisation
  • Block Level to System Implementation
  • High Coverage Verification
  • Behavioural Modelling
  • Scripted Build/Synthesis Flows
  • Timing Analysis and Simulation
  • Clock Domain Crossing Analysis
  • Analogue Modelling
  • System Simulation
PCB Design Test and Evaluation
  • Low Power
  • Low Noise
  • High Frequency
  • Prototypes and Demonstrators
  • ASIC Evaluation PCBs
  • Design Evaluation and Characterisation
  • Automated Regression/Production Testing
  • Hardware Evaluation FPGA Builds
  • Defect Investigation and Resolution
  • Production Test FPGA Builds

Latest Blog Posts

Posted 12th July 2019, By Steven S
Expanding on a previous blog post we now expand on building a kernel for a different architecture, cross-compiling.
Posted 4th March 2019, By Lucas N
Our first CI deployments brought many benefits but we felt that there was still a lot of room for improvement. This blog explores how we addressed these ...more
Image for Time Server blog
Posted 11th January 2019, By James H
Making a Stratum 1 Linux Time Server: Part 3 We have found out in the previous two parts of this series why distributed devices might need a method to ...more
Posted 14th December 2018, By James H
In the previous article we saw that getting distributed devices to agree on the current time is hard. This article, the second in a series of three, will ...more

Latest News

Posted 28th June 2019
We've got several 'Reasons to be cheerful' (thank you 'Ian Drury and the Blockheads') here at ITDev. Firstly, we're celebrating two staff milestone ...more
CI Workshop photo collage
Posted 26th March 2019
On 7th March, ITDev brought together peers and associates from over 20 companies to discuss Continuous Integration (CI). As part of the event, we were ...more
ITDev at University of Southampton Careers Fair 2019
Posted 26th February 2019
With available graduate and internship places for this year, ITDev attended the University of Southampton's Engineering and Technology Careers Fair.
Posted 15th February 2019
Following our company tradition, we recently donated the proceeds from our staff-run tuck shop to our nominated charity, Winchester Churches Nightshelter.