High speed PCB evaluation

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News posted 16th February 2009

When designing complex FPGA-based systems to tight deadlines, the time taken to evaluate the first samples of your new PCBs sits right on the critical path. One way to reduce hardware evaluation time is to develop test code for each of the FPGAs on the board. This code can be prepared well in advance of receiving populated PCBs and can be designed to quickly and automatically test all of the FPGA interfaces, giving a high level of coverage within minutes of programming the boards.

ITDev has recently been involved in the development of such test code for one of our customers. When hardware became available and the board was programmed we gave initial feedback to the customer after less than half a day. We were able to report the successful operation of all links for 8 out of 9 different interface types and isolate the error with the failing interface down to a faulty regulator.

ITDev has also made other significant contributions to the development programme. In addition to test code, we have provided functional FPGA and embedded software code amounting to almost 3 man years of effort.

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