IP Development

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ITDev can design custom IP (Intellectual Property) blocks in the widely used hardware description languages VHDL and Verilog. This may be to implement a complex algorithm, accelerate an existing software solution, communicate with a proprietary interface, or to develop other proprietary IP.

Custom IP Blocks

Some examples of custom IP that we have created for our customers:

  • RLDRAM2 Controller - Highly optimised for a specific application.
  • Complex Algorithms - For example, video encoding blocks.
  • Hardware Interface BIST Controller - Built-In Self-Test blocks for a wide variety of interfaces.

Third-Party IP

ITDev is experienced at making effective use of third-party IP blocks in our designs. We will actively seek to minimise costs and time to market by buying-in and integrating standard design components where appropriate.

The following are examples of third-party IP we have integrated into our designs:

  • Memory Controllers - e.g. DDR2
  • High Speed Interfaces - e.g. LVDS
  • Softcore Processors - e.g. Xilinx MicroBlaze

Optimisations

ITDev is familiar with a wide range of optimisation requirements, which vary from project to project. For some projects, a balanced compromise is the best approach, but there are times when designs should be driven by the specific needs of the target hardware, system, or even project plan.

Some possible optimisation priorities are illustrated as follows:

  • Low Power - Minimise toggling of nets, clock frequencies and amount of logic.
  • High Speed - Plan effective pipelining and parallel processing.
  • Minimum Area / FPGA Resource - Share resources, consider moving high speed processing to another clock domain to avoid over constraining the bulk of the logic.
  • Maintainability - Sacrifice some other optimisations where implementing them would be unnecessarily complex.
  • Low Noise - Careful floorplanning, asynchronous interfaces if appropriate, schedule quiet periods if sensitivity is greater at known times.
Anonymous
Systems Application Engineer
Global ASIC/mems company
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Latest Blog Posts

VPK120 development board pictured wearing ear defenders with silent smiley on the fan
Posted 13th June 2023, By Aysa D
This blog contains the final steps for adding the minimal IP to send the necessary SYSMON data to the System Controller for controlling the fan on the AMD ...more
VPK120 development board pictured wearing ear defenders
Posted 25th May 2023, By Aysa D
Whilst developing on an AMD Versal VPK120 you will want to control the fan speed to keep the noise at manageable levels. This guide captures the steps taken to ...more
Robin on a bird table
Posted 20th January 2023, By Andy C
The customer is always right, and he hasn't changed his requirements, but the consultant says they're in constant flux. Who's right? Let's explore further ...
JonO interviewing Matthew
Posted 30th June 2022, By Jon O
30th June and it's Matthew's 2 year anniversary of joining as a full-time member of staff. Matthew spent 2 summers working for us as an intern before joining ...more

Latest News

Posted 12th September 2023
ITDev is proud to announce the launch of a new FPGA video IP core. The core allows integrators to quickly and easily add high-quality colour space conversion ...more
Shot of Sydney Harbour Bridge
Posted 3rd March 2023
We welcome David back from Australia and review some of the actvities we've been engaged with in February 2023.
Posted 9th August 2022
Last month we attended the second TechNES FPGA Frontrunners event, here's our write up from the day ...
Posted 28th July 2022
Here's a short report on our attendance at the ECS Taster week Careers Fair On Tues 26th July. A chance to promote industrial opportunties to year 11 students ...more